The present exemplary embodiments pertain to semiconductor structures and methods of fabricating the semiconductor structures and, more particularly, pertain to back end of the line (BEOL) interconnect structures having air gaps and methods of manufacturing them.
BEOL interconnect structures are typically multilevel structures containing patterns of metal wiring layers encapsulated in a dielectric insulating material.
A continuing and ongoing trend in the semiconductor field is the ever-increasing density of circuit components in integrated circuits. More and more circuit components are being designed within a given integrated circuit area. Techniques have been developed to substantially reduce the sizes of active devices, metal lines, and other components.
A problem with many current integrated circuit designs is capacitance. Airgaps between metal wiring lines have emerged as a leading option for reducing capacitance in metal interconnects.